qcsrc/common/turrets/unit/mlrs.qc

   1 #ifdef REGISTER_TURRET
   2 REGISTER_TURRET(
   3 /* TUR_##id   */ MLRS,
   4 /* function   */ t_mlrs,
   5 /* spawnflags */ TUR_FLAG_SPLASH | TUR_FLAG_MEDPROJ | TUR_FLAG_PLAYER,
   6 /* mins,maxs  */ '-32 -32 0', '32 32 64',
   7 /* model          */ "base.md3",
   8 /* head_model */ "mlrs.md3",
   9 /* netname        */ "mlrs",
  10 /* fullname   */ _("MLRS Turret")
  11 );
  12 #else
  13 #ifdef SVQC
  14 void spawnfunc_turret_mlrs() { SELFPARAM(); if(!turret_initialize(TUR_MLRS)) remove(self); }
  15
  16 float t_mlrs(float req)
  17 {SELFPARAM();
  18     switch(req)
  19     {
  20         case TR_ATTACK:
  21         {
  22             entity missile;
  23
  24             turret_tag_fire_update();
  25             missile = turret_projectile(W_Sound("rocket_fire"), 6, 10, DEATH_TURRET_MLRS, PROJECTILE_ROCKET, TRUE, TRUE);
  26             missile.nextthink = time + max(self.tur_impacttime,(self.shot_radius * 2) / self.shot_speed);
  27             missile.missile_flags = MIF_SPLASH;
  28             te_explosion (missile.origin);
  29
  30             return true;
  31         }
  32         case TR_THINK:
  33         {
  34             // 0 = full, 6 = empty
  35             self.tur_head.frame = bound(0, 6 - floor(0.1 + self.ammo / self.shot_dmg), 6);
  36             if(self.tur_head.frame < 0)
  37             {
  38                 LOG_TRACE("ammo:",ftos(self.ammo),"\n");
  39                 LOG_TRACE("shot_dmg:",ftos(self.shot_dmg),"\n");
  40             }
  41
  42             return true;
  43         }
  44         case TR_DEATH:
  45         {
  46             return true;
  47         }
  48         case TR_SETUP:
  49         {
  50             self.ammo_flags = TFL_AMMO_ROCKETS | TFL_AMMO_RECHARGE;
  51             self.aim_flags = TFL_AIM_LEAD | TFL_AIM_SHOTTIMECOMPENSATE;
  52
  53             self.damage_flags |= TFL_DMG_HEADSHAKE;
  54             self.shoot_flags  |= TFL_SHOOT_VOLLYALWAYS;
  55             self.volly_counter = self.shot_volly;
  56
  57             return true;
  58         }
  59         case TR_PRECACHE:
  60         {
  61             return true;
  62         }
  63     }
  64
  65     return true;
  66 }
  67
  68 #endif // SVQC
  69 #ifdef CSQC
  70 float t_mlrs(float req)
  71 {
  72     switch(req)
  73     {
  74         case TR_SETUP:
  75         {
  76             return true;
  77         }
  78         case TR_PRECACHE:
  79         {
  80             return true;
  81         }
  82     }
  83
  84     return true;
  85 }
  86
  87 #endif // CSQC
  88 #endif // REGISTER_TURRET